The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 17, 2005
Filed:
Feb. 14, 2003
Jenkin Angelo Richard, Palo Alto, CA (US);
Patrick B. Gilliland, Santa Barbara, CA (US);
Eric Vaughan Chamness, Mountain View, CA (US);
Evgueniy Dimitrov Anguelov, Sunnyvale, CA (US);
Jenkin Angelo Richard, Palo Alto, CA (US);
Patrick B. Gilliland, Santa Barbara, CA (US);
Eric Vaughan Chamness, Mountain View, CA (US);
Evgueniy Dimitrov Anguelov, Sunnyvale, CA (US);
Oplink Communications, Inc., Fremont, CA (US);
Abstract
A compact integrated APD device integrates the bias voltage and temperature compensation functions inside a standard 4-pin PIN package. The active components of the bias and temperature compensation circuits are integrated into a single ASIC using a high-voltage CMOS process and operated at frequencies of at least 1 MHz to greatly reduce the size of the passive components. To mount the relatively large ASIC chip inside the package with the APD chip, TIA chip and passives, the 4-pin package may be modified by either recessing the pins inside the can to facilitate surface mounting the ASIC or adding a spacer inside the can to facilitate three-dimensional packaging. Communication with the bias and temperature circuits is accomplished using a unique bi-directional 1-wire serial interface via the power supply pin. A clock signal is preferably embedded in the control data to synchronize the APD with an external controller.