The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2005

Filed:

Apr. 17, 2003
Applicants:

Hibourahima Camara, Wappingers Falls, NY (US);

Louis Lu-chen Hsu, Fishkill, NY (US);

Karl D. Selander, Hopewell Junction, NY (US);

Michael A. Sorna, Hopewell Junction, NY (US);

Inventors:

Hibourahima Camara, Wappingers Falls, NY (US);

Louis Lu-Chen Hsu, Fishkill, NY (US);

Karl D. Selander, Hopewell Junction, NY (US);

Michael A. Sorna, Hopewell Junction, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F003/16 ; G05F001/10 ;
U.S. Cl.
CPC ...
Abstract

As disclosed herein, systems and methods are provided for generating and distributing a plurality of reference currents on an integrated circuit. In a particular embodiment, an integrated circuit is disclosed which includes a reference current generator adapted to generate a plurality of reference currents. Such circuit includes an operational amplifier coupled to receive, at a first polarity input, a reference voltage, and a first transistor Qhaving a biasing input coupled to an output of the operational amplifier. The first transistor also has an output coupled to a fixed potential through a first resistor R, and the output of the first transistor Qis further coupled as feedback to a second polarity input of the operational amplifier. One or more second transistors Qi are provided in the circuit, each of which has a biasing input coupled to the output of the operational amplifier, and an output coupled to the fixed potential through a respective second resistor Ri. In order to conserve chip area and power, the outputs of the second transistors Qi are not coupled as feedback to the operational amplifier. By the action of the operational amplifier, bias is maintained on the first transistor Qand each of the second transistors Qi for each to conduct a reference current Isi.


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