Non-volatile memory devices and methods of fabricating the same

Abstract

Non-volatile memory devices and fabrication methods thereof are provided. The device includes a plurality of isolation layers formed at a semiconductor device, a plurality of stacked gates crossing over an active region between the isolation layers, and an oxidation barrier layer covering the stacked gate. Each of the stacked gates has a control gate electrode crossing over the active region, a floating gate interposed between the control gate electrode and the active region, and an inter-gate dielectric layer interposed between the control gate electrode and the floating gate. Also, the inter-gate dielectric layer has a bottom dielectric layer, an intermediate dielectric layer and a top dielectric layer which are sequentially stacked. The oxidation barrier layer is formed prior to a subsequent thermal oxidation process for curing etch damage that occurs during formation of the stacked gates.