The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2005

Filed:

Dec. 30, 2003
Applicants:

EE Hua Wong, Singapore, SG;

Ranjan Rajoo, Singapore, SG;

Poi Siong Teo, Singapore, SG;

Inventors:

Ee Hua Wong, Singapore, SG;

Ranjan Rajoo, Singapore, SG;

Poi Siong Teo, Singapore, SG;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L021/44 ;
U.S. Cl.
CPC ...
Abstract

We disclose a technique to generate stretched solder columns (bumps) at the wafer level, suitable for wafer level packaging. This is accomplished through use of using two wafers—the standard (functional) wafer that contains the integrated circuits and a master (dummy) wafer on whose surface is provided an array of solder bumps that is the mirror image of that on the functional wafer. After suitable alignment, both sets of solder bumps are melted and then slowly brought together till they merge. Then, as they cool, they are slowly pulled apart thereby stretching the merged solder columns. Once the latter have fully solidified, they are separated from the master wafer only.


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