The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2005

Filed:

Jul. 19, 2002
Applicants:

Hirofumi Fujii, Osaka, JP;

Shunichi Hayashi, Osaka, JP;

Inventors:

Hirofumi Fujii, Osaka, JP;

Shunichi Hayashi, Osaka, JP;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01R043/00 ;
U.S. Cl.
CPC ...
Abstract

A method for manufacturing wired circuit board that enables a wired circuit board of high quality to be manufactured without changing in dimension of the wired circuit board substantially. In this method, the wired circuit board is wound in layers in the winding process in such a manner that after an uncured thermosetting resin layer is formed on the wired circuit board in the resin layer forming process, a right-side spacer and a left-side spacer are disposed on the already wound wired circuit board at both widthwise ends thereof and also an upper spacer is disposed on the right-side spacer and the left-side spacer so as to cover a widthwise area of the wired circuit board, so that the right-side spacer, the left-side spacer and the upper spacer are positioned between the layers of the wired circuit board when wound. Thereafter, the wired circuit board wound in the rolled state is heated as it is, to cure the uncured thermosetting resin layer in the curing process.


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