The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 03, 2005

Filed:

Feb. 04, 2002
Applicants:

Jeffrey P. Kotowski, Nevada City, CA (US);

Kyle Fodchuk, Nevada City, CA (US);

Inventors:

Jeffrey P. Kotowski, Nevada City, CA (US);

Kyle Fodchuk, Nevada City, CA (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F013/00 ; H03K019/0175 ;
U.S. Cl.
CPC ...
Abstract

An integrated circuit including operational circuitry operable in response to at least one control signal asserted to an external node from an external source, and test circuitry coupled to the external node and the operational circuitry. In response to data asserted to the external node from an external source, the test circuitry enters a test mode in which it tests, configures, or reconfigures the operational circuitry. The test circuitry also asserts to the operational circuitry each control signal received at the external node (or an amplified or translated version thereof). Other aspects of the invention include test circuitry for use in a circuit having an access node and methods for performing on-chip testing, configuration, and control of operational circuitry within a chip in response to test data and at least one control signal asserted from an external source to an external node.


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