The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 26, 2005
Filed:
Jan. 29, 2003
Yuji Watarai, Kasugai, JP;
Yuji Watarai, Kasugai, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
In designing a semiconductor device, a method of verifying an upper-hierarchy logic including a lower-hierarchy logic. First, a first verification logic having an output terminal, which is equivalent to an input terminal of the lower-hierarchy logic, and an input terminal, which is equivalent to an output terminal of the lower-hierarchy logic. Then, a second verification logic including only the input terminal and output terminal of the lower-hierarchy logic is produced, and an operational verification of the upper-hierarchy logic is executed using the first and second verification logics. This method eliminates the need for performing an operational verification of the lower-hierarchy logic at the time of the operational verification of the upper-hierarchy logic.