The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 26, 2005

Filed:

Oct. 24, 2002
Applicants:

Salvatore Torrisi, Catania, IT;

Giampiero Sberno, Catania, IT;

Nicolas Demange, Cannizzaro, IT;

Inventors:

Salvatore Torrisi, Catania, IT;

Giampiero Sberno, Catania, IT;

Nicolas Demange, Cannizzaro, IT;

Assignee:

STMicroelectronics S.r.l., Agrate Brianza, IT;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C011/22 ;
U.S. Cl.
CPC ...
Abstract

A method of sensing a ferroelectric non-volatile information storage unit comprising two ferroelectric storage capacitors in mutually opposite polarization states, and a sensing circuit for actuating the method. The method comprises the steps of: making a voltage applied across the two storage capacitors substantially zero; starting from this condition, progressively increasing the voltage applied thereacross by supplying a prescribed current, until a first one of the two storage capacitors approaches a condition of polarization state reversal, thereby the voltage applied across said first storage capacitor starts to decrease with respect to the voltage applied across the second storage capacitor; and amplifying a voltage difference between the voltages applied across the two storage capacitors by making the voltage applied across the first storage capacitor substantially zero and the voltage applied across the second storage capacitor substantially equal to a non-zero voltage corresponding to a logic state opposite to a logic state corresponding to the zero voltage.


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