The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 26, 2005
Filed:
Apr. 05, 2002
Axel Thomsen, Austin, TX (US);
Sherry Wu, Austin, TX (US);
Murari Kejariwal, Austin, TX (US);
Ammisetti Prasad, Austin, TX (US);
John Laurence Melanson, Austin, TX (US);
Axel Thomsen, Austin, TX (US);
Sherry Wu, Austin, TX (US);
Murari Kejariwal, Austin, TX (US);
Ammisetti Prasad, Austin, TX (US);
John Laurence Melanson, Austin, TX (US);
Cirrus Logic, Inc., Austin, TX (US);
Abstract
A method of testing an integrated circuit includes setting a guardbanded limit for a parameter associated with an embedded node, a deviation from the guardbanded limit under a set of test conditions correlated with a failure of the integrated circuit across a range of operating conditions. A test is performed under the test conditions to detect deviations of the parameter from the guardbanded limit to detect failures of the integrated circuit over the range of operating conditions.