The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 26, 2005
Filed:
Feb. 28, 2002
Wai Yew Lo, Petaling Jaya, MY;
Azhar Bin Aripin, Selangor, MY;
Kong Bee Tiu, Port Klang, MY;
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A stacked multichip package () has a base carrier () having a top side () and a bottom side (), a bottom integrated circuit die () having a bottom surface () attached to the base carrier top side (), and an opposing, top surface (). The top surface () has a peripheral area including a plurality of first bonding pads and a central area (). A bead () is formed on the top surface () of the bottom die () between the peripheral area and the central area (). A top integrated circuit die () having a bottom surface is positioned over the bottom die () and the bottom surface of the top die () is attached to the top surface () of the bottom die () via the bead (). The bead () maintains a predetermined spacing between the bottom die () and the top die () so that wirebonds of first wires () connecting the bottom die () to the base carrier () are not damaged when the top die () is attached to the bottom die ().