The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 26, 2005

Filed:

Sep. 18, 2003
Applicants:

John Bruley, Poughkeepsie, NY (US);

Terence Kane, Wappingers Falls, NY (US);

Michael P. Tenney, Poughkeepsie, NY (US);

Yun Yu Wang, Poughquag, NY (US);

Inventors:

John Bruley, Poughkeepsie, NY (US);

Terence Kane, Wappingers Falls, NY (US);

Michael P. Tenney, Poughkeepsie, NY (US);

Yun Yu Wang, Poughquag, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L031/26 ; H01L021/66 ;
U.S. Cl.
CPC ...
Abstract

This invention relates to a method for electrically localizing site-specific defective sub 130 nm node MOSFET devices with shallow (less than 80 nm deep) source/drain junctions utilizing bulk silicon, or Silicon on Insulator (SOI), or strained silicon (SE), followed by optimized sample preparation steps that permits imaging, preferably high resolution electron holographic imaging, in an electron microscope to detect blocked implants, asymmetric doping, or channel length variations affecting MOSFET device performance. Detection of such defects in such shallow junctions enables further refinements in process simulation models and permits optimization of MOSFET device designs.


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