The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6882207 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 19, 2005

Filed:

Jun. 25, 2003
Applicants:

Hirokuni Fujiyama, Osaka, JP;

Takashi Morie, Osaka, JP;

Inventors:

Hirokuni Fujiyama, Osaka, JP;

Takashi Morie, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L005/00 ;
U.S. Cl.
CPC ...
Abstract

In an offset control circuit, a voltage/current converting portion generates differential current (I+ and I−) that are proportional to a potential difference between differential input voltage signals (VIN+ and VIN−), and an offset adjusting current-generating portion generates offset adjusting currents (Iofs+ and Iofs−). In a current/voltage converting portion, a current (Ir) that is proportional to a potential difference between differential terminals flows through. Differential current output terminals, offset adjusting current-output terminals and the differential terminals are connected. The offset components contained in the differential input voltage signals (VIN+ and VIN−) are adjusted with the offset adjusting currents (Iofs+ and Iofs−), and differential output voltage signals (VO+ and VO−) in which the offset components are added to the differential input voltage signals (VIN+ and VIN−) are generated.


Find Patent Forward Citations

Fujiyama, Hirokuni. (2005). Offset control circuit (U.S. Patent No. 6882207). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6882207

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