The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 12, 2005

Filed:

Nov. 21, 2000
Applicants:

Carol L. Thompson, San Jose, CA (US);

Michael L. Ziegler, Campbell, CA (US);

Inventors:

Carol L. Thompson, San Jose, CA (US);

Michael L. Ziegler, Campbell, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F009/45 ;
U.S. Cl.
CPC ...
Abstract

The present invention provides a method (FIG.) and an apparatus that enable spare instruction slots within a code module to be utilized opportunistically for insertion of instructions associated with correctness check functions. During the generation of the initial instruction schedule, the compiler examines the initial instruction schedule and determines locations of spare instruction slots that can potentially be utilized for insertion of the correctness check code sequences. If a sufficient number of spare instruction slots exist to accommodate the correctness check code sequences, the sequences are inserted into the instruction schedule. If an insufficient number of spare instruction slots exist to accommodate a code sequence, the compiler adds additional instruction slots if a sufficient number of additional instruction slots can be added for insertion of the check sequences without exceeding a run-time performance cost tolerance level designated by a user.


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