The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 12, 2005

Filed:

Apr. 09, 2003
Applicant:

Patrick G. Drennan, Gilbert, AZ (US);

Inventor:

Patrick G. Drennan, Gilbert, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F017/50 ;
U.S. Cl.
CPC ...
Abstract

In one embodiment, a method () is provided for improving switched capacitor performance by lowering a mismatch constraint to be equal to, or nearly equal to, a noise constraint. The mismatch constraint is lowered by increasing a finger spacing of a fringe capacitor design () while maintaining the same surface area covered by the fringe capacitor design (). In another embodiment, a noise constraint is lowered by decreasing finger spacing. Lowering the noise constraint by decreasing finger spacing reduces the area of a fringe capacitor used in, for example, an analog-to-digital converter. Both embodiments may improve performance of the analog-to-digital converter by lowering power consumption, increasing speed, or both.


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