The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 12, 2005
Filed:
Oct. 31, 2000
Harry C. Blackmon, Plano, TX (US);
Tony M. Brewer, Plano, TX (US);
Harold W. Dozier, Dallas, TX (US);
Jim Kleiner, Dallas, TX (US);
Thomas C. Mcdermott, Iii, Plano, TX (US);
Gregory S. Palmer, Plano, TX (US);
Keith W. Shaw, Plano, TX (US);
David Traylor, Richardson, TX (US);
Harry C. Blackmon, Plano, TX (US);
Tony M. Brewer, Plano, TX (US);
Harold W. Dozier, Dallas, TX (US);
Jim Kleiner, Dallas, TX (US);
Thomas C. McDermott, III, Plano, TX (US);
Gregory S. Palmer, Plano, TX (US);
Keith W. Shaw, Plano, TX (US);
David Traylor, Richardson, TX (US);
Chiaro Networks, Ltd., Richardson, TX (US);
Abstract
Router line cards are partitioned, separating packet forwarding from external or internal interfaces and enabling multiple line cards to access any set of external or internal data paths. Any failed working line card can be switchably replaced by another line card. In particular, a serial bus structure on the interface side interconnects any interface port within a protection group with a protect line card for that group. Incremental capacity allows the protect line card to perform packet forward functions. Logical mapping of line card addressing and identification provides locally managed protection switching of a line card that is transparent to other router line cards and to all peer routers. One-for-N protection ratios, where N is some integer greater than two, can be achieved economically, yet provide sufficient capacity with acceptable protection switch time under 100 milliseconds. Alternatively, protect line cards can routinely carry low priority traffic that is interruptible, allowing the protect line card to handle higher priority traffic previously carried by a failed working line card. This approach renders unnecessary engineering a network for less than full capacity to allow rerouting in the event of individual line card failure. Consequently, all data paths can be fully utilized. If a particular interface module on one data bus needs removal for maintenance, a duplicate data bus is available intact, allowing hot replacement of any working or protect interface module, even while a line card protection switch is in effect.