The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 12, 2005
Filed:
Oct. 28, 2003
Tadahiko Matsumoto, Yokohama, JP;
Tadahiko Matsumoto, Yokohama, JP;
Murata Manufacturing Co., Ltd., Kyoto, JP;
Abstract
A DC-DC converter includes an ON-timing delay circuit in which, when an ON signal is output from a power switch driving circuit in a control IC to a power switch, the ON timing of the power switch is delayed by hindering the start of the ON operation of the power switch. An early turnoff circuit is provided in which, during delay of the ON timing of the power switch, a commutating synchronous rectifier has an ON and OFF switching operation that is inverse with respect to that of the power switch. A delay eliminating circuit is provided which promptly stops the delay operation of the ON-timing delay circuit when detecting the turnoff of the commutating synchronous rectifier which is caused by a drop in the gate of a commutating synchronous rectifier. When the delay operation of the ON-timing delay circuit continues after the turnoff the commutating synchronous rectifier, a loss caused by the continuation of the delay operation occurs. The problem can be prevented by the delay eliminating circuit.