The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 05, 2005
Filed:
Dec. 23, 2002
Frank Worrell, San Jose, CA (US);
Frank Worrell, San Jose, CA (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
A disclosed address generation system includes a decrementer and a multiplexer. The decrementer produces a decremented address signal by subtracting a first integer value from an incremented address signal. The multiplexer produces either the incremented address signal or the decremented address signal dependent upon a control signal. A described instruction fetch apparatus includes an instruction queuing and selection subsystem producing either an even portion or an odd portion of an instruction data block, specified by a first address signal, as a fetched instruction dependent upon one or more control signals generated based on determining bits of second and third address signals. A disclosed central processing unit (CPU) includes an instruction cache and a processor core, wherein the processor core includes an address generation subsystem generating the first, second, and third address signals, and the instruction queuing and selection subsystem. A method is described for fetching an instruction.