The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 05, 2005
Filed:
Jul. 20, 2000
Armin Pitzer, Krefeld, DE;
Torsten Hinz, Neuss, DE;
Armin Pitzer, Krefeld, DE;
Torsten Hinz, Neuss, DE;
Infineon Technologies AG, Munich, DE;
Abstract
A digitally controlled circuit for reducing the phase modulation of a signal. The circuit has a multiphase clock generator that produces n phases of a clock that is m-times the signal. The circuit further has a multiplexer with n inputs for the n phases of the clock and with one output which supplies the output signal. The output signal and the signal are connected to the inputs of a phase comparator. The output signal of the comparator is supplied to a sigma-delta modulator whose output signals are used for controlling the multiplexer. A jittered input signal is compared in the phase comparator with a master clock. The determined phase difference is integrated in a sigma-delta modulator. The aim of the circuit is to generate a clock without jitter, digitally and without using external components. This circuit provides 20 dB/decade attenuation of the jitter received in the SYNC signal, based on the P-regulator characteristic.