The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 05, 2005
Filed:
May. 21, 2003
Applicant:
John E. Turner, Santa Cruz, CA (US);
Inventor:
John E. Turner, Santa Cruz, CA (US);
Assignee:
Altera Corporation, San Jose, CA (US);
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C011/00 ;
U.S. Cl.
CPC ...
Abstract
Programmable logic devices are provided having configuration memory cells that exhibit decreased soft error rates. A stabilizing capacitor may be connected between each of the memory cell's input and output terminals. The capacitor may be a metal-insulator-metal capacitor formed using a vertical structure, a horizontal structure, or a hybrid vertical-horizontal structure. The memory cell may have inverter transistors of increased strength to help stabilize the memory cell.