The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 2005

Filed:

May. 25, 2000
Applicants:

Tetsushi Sato, Tokyo, JP;

Hiroyuki Sekine, Tokyo, JP;

Inventors:

Tetsushi Sato, Tokyo, JP;

Hiroyuki Sekine, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G003/36 ;
U.S. Cl.
CPC ...
Abstract

A scanning circuit having such a high operation margin for the phase deviation of clock signal that its operation is stable. The scanning circuit includes a bidirectional shift register having transfer gates of a transfer unit and a feedback circuit, the operation of which is control led by four phase clocks. The scanning circuit comprises a delay circuit () that delays control clocks (A, B) supplied to the transfer gates of the transfer unit () relative to control clocks (C, D) supplied to the feedback circuit ().


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Sato, Tetsushi. (2005). Scanning circuit (U.S. Patent No. 6876352). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6876352

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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