The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 2005

Filed:

May. 20, 2003
Applicants:

Toshio Sunaga, Shiga-ken, JP;

Hisatada Miyatake, Shiga-ken, JP;

Kohji Kitamura, Shiga-ken, JP;

Inventors:

Toshio Sunaga, Shiga-ken, JP;

Hisatada Miyatake, Shiga-ken, JP;

Kohji Kitamura, Shiga-ken, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K019/177 ;
U.S. Cl.
CPC ...
Abstract

It is one object of the present invention to provide an FPGA for which the configuration time and the time required for rewriting connection information and logic structure information can be reduced, and for which the size of the area occupied can also be reduced. In order to store connection information for an FPGA, magnetic storage elements MTJto MTJn, which are memory cells of an MRAM, are provided, and using a shift register, connection information is written to the magnetic storage elements MTJto MTJn. The shift registerincludes register elements SRto SRn, which correspond to the magnetic storage elements MTJto MTJn, to which the connection information is serially input and stored. When the power is switched on, the connection information stored in the magnetic storage elements MTJto MTJn is latched by latch elements LTto LTn, and is output to switching circuitsto interconnect logic blocks


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