Fabricating method of an array substrate having polysilicon thin film transistor

Abstract

A fabricating method of an array substrate includes: forming a semiconductor layer of polysilicon on a substrate, the semiconductor layer having first and second regions; forming a gate insulating layer on the semiconductor layer; forming a gate electrode on the gate insulating layer on the first region of the semiconductor layer; forming source and drain regions by doping impurities into the second region of the semiconductor layer; forming an interlayer insulating layer on the gate electrode and the source and drain regions, the interlayer insulating layer having first and second contact holes exposing the source and drain regions, respectively, the first and second contact holes being formed by consecutive dry and wet etching methods; forming source and drain electrodes on the interlayer insulating layer, the source and drain electrodes contacting the source and drain regions through the first and second contact holes, respectively; forming a passivation layer on the source and drain electrodes, the passivation layer having a third contact hole exposing the drain electrode; and forming a pixel electrode on the passivation layer, the pixel electrode contacting the drain electrode through the third contact hole.