The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 29, 2005
Filed:
Feb. 24, 2004
Chih-feng Huang, Jhubei, TW;
Ta-yung Yang, Milpitas, CA (US);
Jenn-yu G. Lin, Taipei, TW;
Tuo-hsin Chien, Tucheng, TW;
Chih-Feng Huang, Jhubei, TW;
Ta-yung Yang, Milpitas, CA (US);
Jenn-yu G. Lin, Taipei, TW;
Tuo-Hsin Chien, Tucheng, TW;
System General Corp., Taipei Hsien, TW;
Abstract
A high voltage LDMOS transistor according to the present invention includes P-field blocks in the extended drain region of a N-well. The P-field blocks form the junction-fields in the N-well for equalizing the capacitance of parasitic capacitors between the drain region and the source region and fully deplete the drift region before breakdown occurs. A higher breakdown voltage is therefore achieved and the N-well having a higher doping density is thus allowed. The higher doping density reduces the on-resistance of the transistor. Furthermore, the portion of the N-well generated beneath the source diffusion region produces a low-impedance path for the source region, which restricts the transistor current flow in between the drain region and the source region.