Semiconductor storage device with signal wiring lines rmed above memory cells

Abstract

Memory cells, word lines and bit lines are formed on the substrate. Each word line is connected to some memory cells. The bit line is disposed in a wiring layer above the word lines, the bit line being connected to some memory cells and applied with a signal read from the memory cell selected by the word lines. Signal wiring lines are disposed in a wiring layer above the bit lines and partially superposed upon the bit lines. A shield layer is disposed in a wiring layer between the bit lines and signal wiring lines. As viewed along a direction vertical to the surface of the semiconductor substrate, the shield layer includes the bit lines in an area including an area where the bit lines and signal wiring lines are superposed upon each other, openings being formed through the shield layer in areas where the bit lines are not disposed.