The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 22, 2005
Filed:
Jun. 23, 2003
Vincent Dessard, Louvain la Neuve, BE;
Stéphane Adriaensen, Rhode-Saint-Genèse, BE;
Denis Flandre, Brussels, BE;
David Levacq, Brussels, BE;
Vincent Dessard, Louvain la Neuve, BE;
Stéphane Adriaensen, Rhode-Saint-Genèse, BE;
Denis Flandre, Brussels, BE;
David Levacq, Brussels, BE;
Universite Catholique de Louvain, Belgique, BE;
Abstract
The present invention relates to an ultra-low power (ULP) MOS diode. The diode has a first and a second terminal. It comprises an n-MOS transistor having a channel, a first N+ doped diffusion region at one extremity of the channel and a second N+ diffusion region at the other extremity of the channel, and a p-MOS transistor having a channel and a first P+ doped diffusion region at one extremity of the channel and a second P+ diffusion region at the other extremity of the channel. The first N+ diffusion region of the n-MOS transistor is coupled to the first P+ diffusion region of the p-MOS transistor, the gate of the n-MOS transistor is coupled to the second P+ diffusion region of the p-MOS transistor, and the gate of the p-MOS transistor is coupled to the second N+ diffusion region of the n-MOS transistor. The second P+ diffusion region of the p-MOS transistor is coupled to the first terminal of the diode and the second N+ diffusion region of the n-MOS transistor is coupled to the second terminal of the diode. The diode has a current versus voltage characteristic such that it has a negative slope in a reverse biased state of the diode.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile