The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 15, 2005

Filed:

Aug. 07, 2001
Applicants:

Edward Tang Kwai MA, Plano, TX (US);

Stephen N. Grider, Argyle, TX (US);

Frank V. Taylor, Iii, Highland Village, TX (US);

Joseph P. Gorski, Plano, TX (US);

Andrew D. Jones, Richardson, TX (US);

Ann Little, Corinth, TX (US);

Inventors:

Edward Tang Kwai Ma, Plano, TX (US);

Stephen N. Grider, Argyle, TX (US);

Frank V. Taylor, III, Highland Village, TX (US);

Joseph P. Gorski, Plano, TX (US);

Andrew D. Jones, Richardson, TX (US);

Ann Little, Corinth, TX (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G08F011/00 ;
U.S. Cl.
CPC ...
Abstract

Methods, systems, and arrangements enable efficient reprogramming of a memory block of a microcontroller. Two blocks of memory each have a different logical location with respect to a processor of the microcontroller. The first memory may store vector information to be executed by the processor. The second memory may store data information. The logical location of each memory block is dependent on the value of a pre-determined bit in a specified register. When a user wishes to reprogram the contents of the first memory, the user enters new code into the second memory. Upon completion, the value of the pre-determined bit is changed, and the logical locations of the first and second memories are interchanged. In effect, the newly entered code from the second memory is accessed as if it were in the first memory (e.g., from an addressing perspective), and the processor may execute the new program (e.g., after the processor undergoes a system reset).


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