The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 15, 2005
Filed:
Jan. 19, 2002
Dragan Maksimovic, Boulder, CO (US);
Sandeep Dhar, Boulder, CO (US);
Bruno Kranzen, San Jose, CA (US);
Ravindra Ambatipudi, Milpitas, CA (US);
Dragan Maksimovic, Boulder, CO (US);
Sandeep Dhar, Boulder, CO (US);
Bruno Kranzen, San Jose, CA (US);
Ravindra Ambatipudi, Milpitas, CA (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
There is disclosed a digital circuit comprising a digital processing component, an adjustable power supply and power supply adjustment circuitry. The digital processing component is capable of operating at a plurality of selected clock frequencies, wherein a maximum delay time of a critical path in the digital processing component is determined by a level of a power supply, VDD, of the digital processing component. The adjustable power supply is capable of supplying VDD to the digital processing component. The power supply adjustment circuitry is operable to receive a first selected clock signal and adjusts the level of VDD such that the maximum delay time of the critical path of the digital processing component is less than a pulse-width duration between a first clock edge of the first selected clock signal and a second clock edge of the first selected clock signal immediately following the first clock edge.