The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 15, 2005

Filed:

Sep. 22, 1998
Applicant:

Naoya Hayashi, Tokyo, JP;

Inventor:

Naoya Hayashi, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04J003/04 ;
U.S. Cl.
CPC ...
Abstract

In a data multiplexing apparatus, a single external memory stores different kinds of transfer data. A header cache memory stores the system header and the header data, and a plurality of data cache memories stores the transfer data. The cache memories are connected via an internal bus to the external memory. A data input circuit sequentially fetches the transfer data from the external memory on a time division basis, so that the transfer data is stored in one of the data cache memories. Also, a system clock signal generation circuit constantly generates a system clock signal indicating the current time. A selector circuit sequentially selects the cache memories and generates a system stream formed by the system header, the header data and the transfer data. In this case, the selector circuit further selects the system clock generation circuit to input the system clock signal to a predetermined position of the system header.


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