The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 15, 2005
Filed:
Nov. 26, 2002
Edwin M. Fulcher, Palo Alto, CA (US);
Edwin M. Fulcher, Palo Alto, CA (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
An integrated circuit having signal traces, power traces, and ground traces. The signal traces are disposed on at least one signal distribution layer, and the signal traces on the at least one signal distribution layer are formed at no more than a first thickness. The power traces and ground traces are formed on at least one power ground distribution layer, where the at least one power ground distribution layer is an overlying layer of the integrated circuit relative to the at least one signal distribution layer. The power traces and ground traces on the at least one power ground distribution layer are formed at no less than a second thickness that is greater than the first thickness of the signal traces. In this manner, the signal traces, which can be formed with a relatively thin thickness, can be placed very close together on the signal distribution layers, and have sufficient conductivity for the signals transmitted thereon. At the same time, the power and ground traces, which are typically required to carry a greater current, can be formed with a relatively thick thickness and with wider widths, without taking up precious space on the signal distribution layers. In this manner, the signal traces can be placed closed together, both because they are thinner and because space is not taken by power and ground traces on the same layer, and thus they require less space, and the integrated circuit can be made smaller.