The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 08, 2005

Filed:

Jul. 26, 2001
Applicants:

Jody Bern Joyner, Austin, TX (US);

Ravi Kumar Arimilli, Austin, TX (US);

Jerry Don Lewis, Round Rock, TX (US);

Vicente Enrique Chung, Austin, TX (US);

Inventors:

Jody Bern Joyner, Austin, TX (US);

Ravi Kumar Arimilli, Austin, TX (US);

Jerry Don Lewis, Round Rock, TX (US);

Vicente Enrique Chung, Austin, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F011/00 ;
U.S. Cl.
CPC ...
Abstract

A computer system of a number of processing nodes operate either in a loop configuration or off of a common bus with high speed, high performance wide bandwidth characteristics. The processing nodes in the system are also interconnected by a separate narrow bandwidth, low frequency recovery bus. When problems arise with node operations on the high speed bus, operations are transferred to the low frequency recovery bus and continue there at a slower rate for recovery operations. The recovery technique may be used to increase system speed and performance on a dynamic basis.


Find Patent Forward Citations

Joyner, Jody. (2005). Robust system bus recovery (U.S. Patent No. 6865695). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6865695

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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