The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 08, 2005

Filed:

Jan. 24, 2000
Applicants:

Jörg Henkel, Plainsboro, NJ (US);

Tony Givargis, Anaheim, CA (US);

Frank Vahid, Corona, CA (US);

Inventors:

Jörg Henkel, Plainsboro, NJ (US);

Tony Givargis, Anaheim, CA (US);

Frank Vahid, Corona, CA (US);

Assignees:

University of California-Riverside, Oakland, CA (US);

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F017/50 ; G06F007/54 ;
U.S. Cl.
CPC ...
Abstract

A method for reducing power consumption by using power estimation data obtained from at the gate-level for a core's representative input stimuli data (instructions), and propagating the power estimation data to a higher (object-oriented) system-level model, which is parameterizable and executable. Depending on the kind of cores, various parameterizable look-up table techniques are used to facilitate self-analyzing core models. As a result, the method is faster than gate-level power estimation techniques and power-related system-level design decisions.


Find Patent Forward Citations

Henkel, Jörg. (2005). Method for core-based system-level power modeling using object-oriented techniques (U.S. Patent No. 6865526). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6865526

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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