Recording-medium operating device, clock signal generating device and method for generating clock signal

Abstract

It is intended to provide a recording-medium operating device, a clock signal generating device for the recoding-medium operating device, and a method for generating a clock signal for the recoding-medium operating device that satisfy both operation with a wide-range data transfer rate using delay line provided with not so large number of stages and high correction accuracy and are advantageous in terms of low power consumption and suppression of noises. A reference clock group Øthrough Øx different in phase are obtained by a PLL. One of the reference clock group is selected by a clock selector. A selected clock signal is inputted to a delay circuitand one of output clocks from a delay lineis selected by a selector. With structure as such, selection by the clock selectorand the selectoris controlled so as to make phase difference between a clock signal and an RF signal minimum. Thereby, time equivalent to phase difference of adjoining two reference clocks is sufficient enough as total delay quantity of the delay line