The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 08, 2005
Filed:
May. 30, 2000
Teruhisa Tsuru, Kameoka, JP;
Mitsuhiro Matsumoto, Shiga-ken, JP;
Teruhisa Tsuru, Kameoka, JP;
Mitsuhiro Matsumoto, Shiga-ken, JP;
Murata Manufacturing Co., Ltd., Kyoto, JP;
Abstract
A delay line comprising a dielectric substrate including a pair of main surfaces; a transmission line disposed on one of the main surfaces of the dielectric substrate; a ground conductor disposed on the other of the main surfaces of the dielectric substrate; and at least one of a variable capacitor and a diode being disposed on the dielectric substrate and connected in parallel to the transmission line for setting a desired delay time of the delay line. In the above delay line, the delay time can be adjusted even after the delay line is mounted on a printed circuit board, and further, the delay time can be continuously adjusted. The delay line can also be formed in a multilayer structure rather than on the above dielectric substrate.