Suppressing the leakage current in an integrated circuit

Abstract

A semiconductor integrated circuit wherein the circuit area can be minimized, and defects can be detected reliably during a standby status while maintaining the reliability of a gate oxide film. Switching circuitis provided between logic circuitand source voltage Vsupply terminal. While in an operating status, 0 V voltage is applied to the gate of transistor MPof switching circuitand bias voltage Vequal to or slightly lower than source voltage Vis applied to its channel region in order to reduce the threshold voltage of transistor MPand increase its current driving capability. While in a standby status, a voltage equal to source voltage Vis applied to the gate of transistor MP, a voltage lower than the source voltage is applied to the source, and bulk bias voltage Vequal to or higher than source voltage Vis applied to the channel region in order to minimize the drain current of transistor MP, so that current path of logic circuitis cut off, and the occurrence of leakage current is suppressed.