The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6864670 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 08, 2005

Filed:

May. 21, 2003
Applicants:

Jr-hong Ouyang, Taipei, TW;

Hui-chuan Lai, Taipei, TW;

Jing-cheng Lin, Taipei, TW;

Inventors:

Jr-Hong Ouyang, Taipei, TW;

Hui-Chuan Lai, Taipei, TW;

Jing-Cheng Lin, Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F001/59 ;
U.S. Cl.
CPC ...
Abstract

A method for eliminating noise interference and acoustic noise by a printed circuit board ground plane layout is disclosed. The method is applied to a circuit system having multiple outputs, wherein the circuit system has a first power converting module, a second power converting module and a printed circuit board. The first power converting module and the second power converting module respectively includes a first ground pin group and a second ground pin group. The method includes the steps of (a) connecting each ground pin of the first ground pin group to a respective solder point and connecting each solder point to a first node, and connecting each ground pin of the second ground pin group to a respective solder point and connecting each solder point to a second node, and (b) connecting the first node and the second node to a common node and connecting the common node to a solder point of a common ground terminal on the printed circuit board ground plane.


Find Patent Forward Citations

Ouyang, Jr-Hong. (2005). Method for eliminating noise interference and acoustic noise by printed circuit board ground plane layout (U.S. Patent No. 6864670). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6864670

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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