The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 08, 2005
Filed:
Apr. 26, 2002
William J. Clatanoff, Austin, TX (US);
Gayle R. T. Schueller, Austin, TX (US);
Robert J. Schubert, Cedar Park, TX (US);
Yusuke Saito, Tokyo, JP;
Hideo Yamazaki, Kanagawa, JP;
Hideaki Yasui, Kanagawa, JP;
William J. Clatanoff, Austin, TX (US);
Gayle R. T. Schueller, Austin, TX (US);
Robert J. Schubert, Cedar Park, TX (US);
Yusuke Saito, Tokyo, JP;
Hideo Yamazaki, Kanagawa, JP;
Hideaki Yasui, Kanagawa, JP;
3M Innovative Properties Company, St. Paul, MN (US);
Abstract
A circuit includes a substrate having a dielectric layer with a first surface and a second surface. A conductive layer is formed on the first surface. A beveled via is formed in a dielectric layer of the substrate. The via has a first opening of a first width in the first surface, and a second opening of a second width in the second surface, the second width being greater than the first width. A conductive plug is connected to the conductive layer. The plug is formed in the via and extends from adjacent the first opening toward the second opening, and terminates adjacent the second opening at a plug interface surface. A conductive solder ball is connected to the plug interface surface and extends to protrude from the second surface.