The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 01, 2005
Filed:
Aug. 21, 2002
Richard T. Nesbitt, San Diego, CA (US);
Jim Icuss, San Diego, CA (US);
Hong Dai, San Diego, CA (US);
Richard T. Nesbitt, San Diego, CA (US);
Jim Icuss, San Diego, CA (US);
Hong Dai, San Diego, CA (US);
Applied Micro Circuits Corporation, San Diego, CA (US);
Abstract
An automated test system for testing electrical device I/O pad continuity includes a load board upon which the device under test ('DUT') is mounted. The number of I/O pins on the DUT exceeds the number of direct testing channels available on the load board. The excess number of I/O pins are connected to boundary scan cells of one or more boundary scan devices. The boundary scan devices receive one or more test data input patterns and test control signals via connection points on the load board. The boundary scan devices, which are complaint with JTAG boundary scan testing standards, are utilized to indirectly test the electrical continuity from the I/O pads of the DUT to the external pins or solder balls of the DUT.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile