The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 01, 2005
Filed:
Jun. 28, 2004
John M. Burgan, North Palm Beach, FL (US);
John M. Burgan, North Palm Beach, FL (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A memory () includes a variable refresh control circuit () for controlling the refresh rate of a memory array () using a capacitor for data storage. In one embodiment, each test cell of a plurality of test memory cells (, and) is refreshed at different rates. A monitor circuit () is provided for monitoring the stored logic state of each of the plurality of test memory cells, and in response, adjusting the refresh rate of the memory array (). In another embodiment, a variable refresh control circuit (') includes a plurality of test memory cells (, and) that are all refreshed at the same rate but each of the test memory cells (, and) is implemented to have a different charge storage capacity than the other test memory cells. The monitor circuit () monitors the stored logic state of each of the plurality of test memory cells (, and), and in response, adjusts a refresh rate of the memory array ().