The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 01, 2005

Filed:

Dec. 17, 2003
Applicants:

Kinji Kayanuma, Tokyo, JP;

Toshiaki Iwanaga, Tokyo, JP;

Chosaku Noda, Yokohama, JP;

Inventors:

Kinji Kayanuma, Tokyo, JP;

Toshiaki Iwanaga, Tokyo, JP;

Chosaku Noda, Yokohama, JP;

Assignees:

NEC Corporation, Tokyo, JP;

Kabushiki Kaisha Toshiba, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M007/00 ;
U.S. Cl.
CPC ...
Abstract

In a code modulating method and a code modulating apparatus, a run length has an encoding rate of ⅔ which is equal to that of (1, 7) modulation, and indicates the number of '0' bits between adjacent ones of '1' bits in the channel bit train. A data bit train is converted into the channel bit train so that the run length has a minimum value 1 and a maximum value 10. Further, upon converting any data bit train, the channel bit train does not include a pattern “1010101010101” in which the run length 1 is continuously repeated six times or more. The channel bit train has a DSV (Digital Sum Value) control bit which selects the “0” bit or “1” bit in accordance with a DSV. The channel bit train obtained by using random data for the data bit train is NRZI converted into a signal. A frequency component of the signal is reduced from a maximum value of the frequency component by 20 dB or less as a power density at a frequency of {fraction (1/10,000)} or less of a channel clock frequency.


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