The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 01, 2005

Filed:

Jan. 28, 2000
Applicants:

Lawrence S. Pan, Los Gatos, CA (US);

Donald R. Schropp, Jr., San Jose, CA (US);

Vasil M. Chakarov, San Jose, CA (US);

John K. O'reilly, San Francisco, CA (US);

George B. Hopple, Palo Alto, CA (US);

Christopher J. Spindt, Menlo Park, CA (US);

Roger W. Barton, Tofte, MN (US);

Michael J. Nystrom, San Jose, CA (US);

Ramamoorthy Ramesh, Silver Spring, MD (US);

James C. Dunphy, San Jose, CA (US);

Shiyou Pei, San Jose, CA (US);

Kollengode S. Narayanan, Cupertino, CA (US);

Inventors:

Lawrence S. Pan, Los Gatos, CA (US);

Donald R. Schropp, Jr., San Jose, CA (US);

Vasil M. Chakarov, San Jose, CA (US);

John K. O'Reilly, San Francisco, CA (US);

George B. Hopple, Palo Alto, CA (US);

Christopher J. Spindt, Menlo Park, CA (US);

Roger W. Barton, Tofte, MN (US);

Michael J. Nystrom, San Jose, CA (US);

Ramamoorthy Ramesh, Silver Spring, MD (US);

James C. Dunphy, San Jose, CA (US);

Shiyou Pei, San Jose, CA (US);

Kollengode S. Narayanan, Cupertino, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01J001/62 ; H01J019/42 ;
U.S. Cl.
CPC ...
Abstract

The present invention provides a spacer assembly which is tailored to provide a secondary electron emission coefficient of approximately 1 for the spacer assembly when the spacer assembly is subjected to flat panel display operating voltages. The present invention further provides a spacer assembly which accomplishes the above achievement and which does not degrade severely when subjected to electron bombardment. The present invention further provides a spacer assembly which accomplishes both of the above-listed achievements and which does not significantly contribute to contamination of the vacuum environment of the flat panel display or be susceptible to contamination that may evolve within the tube. Specifically, in one embodiment, the present invention is comprised of a spacer structure which has a specific secondary electron emission coefficient function associated therewith. The material comprising the spacer structure is tailored to provide a secondary electron emission coefficient of approximately 1 for the spacer assembly when the spacer assembly is subjected to flat panel display operating voltages.


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