The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 01, 2005
Filed:
Feb. 21, 2003
Jay A. Shideler, Los Altos Hills, CA (US);
Jay A. Shideler, Los Altos Hills, CA (US);
Micrel, Inc., San Jose, CA (US);
Abstract
A method for forming a heterojunction bipolar transistor includes forming an epitaxial layer, forming a first polysilicon layer, and forming a dielectric layer on the first polysilicon layer. The first polysilicon layer and the dielectric layer include an opening for exposing a portion of the top surface of the epitaxial layer. Then, a silicon germanium layer is selectively grown in the opening. The silicon germanium layer is grown on the exposed top surface of the epitaxial layer and on the exposed sidewall of the first polysilicon layer. Next, a spacer is formed along the sidewalls of the dielectric layer and the silicon germanium layer. A second polysilicon layer in electrical contact with the silicon germanium layer is then formed. Accordingly, a low resistance connection between the first polysilicon layer forming the extrinsic base region and the silicon germanium layer forming the intrinsic base region of the transistor is formed.