The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 22, 2005

Filed:

Apr. 17, 2003
Applicants:

Akira Kuronuma, Tokyo, JP;

Souhei Tanaka, Kanagawa, JP;

Masafumi Wataya, Kanagawa, JP;

Toru Nakayama, Kanagawa, JP;

Takuji Katsu, Kanagawa, JP;

Inventors:

Akira Kuronuma, Tokyo, JP;

Souhei Tanaka, Kanagawa, JP;

Masafumi Wataya, Kanagawa, JP;

Toru Nakayama, Kanagawa, JP;

Takuji Katsu, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F013/28 ;
U.S. Cl.
CPC ...
Abstract

A DMA controller arbitrates and selects a DMA control information signal received from at least one of a plurality of DMA request blocks and accesses an SDRAM on the basis of the selected DMA control information signal. In the DMA controller, an SDRAM controller detects using a detector the number of possible sequential accesses on the basis of a DMA start address signal, compares using a comparator this number of possible sequential accesses with the burst DMA request number designated by a BSTNUM signal, selects not larger one of the two numbers, and sets the number of sequential DMAs to be actually executed to the selected number. Accordingly, with a simple configuration, sequential access is made possible starting from an arbitrary address.


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