The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 22, 2005

Filed:

May. 27, 2003
Applicants:

Yoshihiro Masumura, Kanagawa, JP;

Nobuteru OH, Kanagawa, JP;

Hiroyuki Furukawa, Kanagawa, JP;

Inventors:

Yoshihiro Masumura, Kanagawa, JP;

Nobuteru Oh, Kanagawa, JP;

Hiroyuki Furukawa, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L023/02 ;
U.S. Cl.
CPC ...
Abstract

A semiconductor device includes an internal circuit area including a plurality of I/O modules, and a peripheral area receiving therein a pair of loop test lines for testing I/O buffers in the I/O modules. The internal test line extending from each of the loop test lines toward the internal circuit area includes an out-module test line formed as the topmost layer, a first in-module test line formed as the topmost layer and connected to the out-module test line, and a second in-module test line, a portion of which is formed by connecting the in-buffer test lines together.


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