Avalanche photodiode array biasing device and avalanche photodiode structure

Abstract

A photodiode array includes a plurality of arrayed individual diode devices. The arrayed diode devices include at least one active photodiode and at least one reference diode. A bias control circuit for the array monitors operation of the reference diode at an applied first bias voltage and adjusts that applied first bias voltage until optimal reference diode operation is reached. A second bias voltage having predetermined relationship to the first bias voltage is applied to the active photodiode to optimally configure array operation. More specifically, an operational characteristic of the reference diode at the first bias voltage is monitored and compared to a reference value. As a result of this comparison, the circuit adjusts the applied first and second bias voltage in order to drive the reference diode measured characteristic to substantially match the reference value. The operational characteristic that is measured may comprise reference diode responsivity or reference diode output current, and may be based on either electrical or optical device operation. Each avalanche photodiode semiconductor structure may have a conventional reverse biased pn junction semiconductor structure providing a high field region as is well known in the art. An enhanced semiconductor structure may also be utilized wherein a heavily doped layer that is physically separate from the pn junction is also included to provide a source of charge carriers that are swept into the high field region.