The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 15, 2005

Filed:

Mar. 13, 2003
Applicants:

Judith E. Allen, Monument, CO (US);

Dennis R. Wilson, Colorado Springs, CO (US);

Joseph Perkalis, Colorado Springs, CO (US);

Inventors:

Judith E. Allen, Monument, CO (US);

Dennis R. Wilson, Colorado Springs, CO (US);

Joseph Perkalis, Colorado Springs, CO (US);

Assignee:

Ramtron International Corporation, Colorado Springs, CO (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C007/00 ;
U.S. Cl.
CPC ...
Abstract

A column decoder cell layout for use in a 1T/1C ferroelectric memory array includes a first column decoder section having two input nodes for receiving a first input/output signal and a first inverted input/output signal, two output nodes for providing a fist bit line signal and a first inverted bit line signal, and a column decode node for receiving a column decode signal, a second column decoder section having two input nodes for receiving a second input/output signal and a second inverted input/output signal, two output nodes for providing a second bit line signal and a second inverted bit line signal, and a column decode node for receiving the column decode signal, wherein the width of the column decoder cell is substantially the same as the width of two columns of 1T/1C memory cells used in the array.


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