The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 15, 2005

Filed:

Mar. 31, 2003
Applicants:

Naoki Nojiri, Osaka, JP;

Koji Takemura, Osaka, JP;

Noriyuki Nagai, Nara, JP;

Atsushi Doi, Osaka, JP;

Inventors:

Naoki Nojiri, Osaka, JP;

Koji Takemura, Osaka, JP;

Noriyuki Nagai, Nara, JP;

Atsushi Doi, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L023/48 ; H01L023/52 ; H01L029/40 ;
U.S. Cl.
CPC ...
Abstract

According to the invention, in input/output circuit portions positioned around a semiconductor chip, electrode pads are arranged above each of a plurality of input/output cells arranged in a line. The width of the electrode pads is greater than the width of the input/output cells, and thus the electrode pads cannot be arranged in a single line and are instead arranged staggered in two lines. The electrode pads of one row are arranged shifted so that they do not overlap with the internal terminals of the input/output cells, but are disposed near these internal terminals. The spacing between the electrode pads is set to a distance that is at least a set distance determined by the isolation rules of the design.


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