The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 15, 2005
Filed:
Oct. 31, 2001
Alexander Kalnitsky, Portland, OR (US);
Joseph Paul Elull, San Jose, CA (US);
Ralph Wall, Beaverton, OR (US);
Robert F. Scheer, Portland, OR (US);
Jonathan Herman, San Jose, CA (US);
Glenn Nobinger, Santa Clara, CA (US);
Viktor Zekeriya, Atherton, CA (US);
Alexander Kalnitsky, Portland, OR (US);
Joseph Paul Elull, San Jose, CA (US);
Ralph Wall, Beaverton, OR (US);
Robert F. Scheer, Portland, OR (US);
Jonathan Herman, San Jose, CA (US);
Glenn Nobinger, Santa Clara, CA (US);
Viktor Zekeriya, Atherton, CA (US);
Maxim Integrated Products, Inc., Sunnyvale, CA (US);
Abstract
A method for forming multiple resistors on a substrate. The method initially includes providing a first resistor on the substrate. A first dielectric layer is deposited, patterned, and selectively etched over the first resistor. Second resistor material is provided over the first dielectric layer. Furthermore, landing pad material is provided over the second resistor material. The landing pad material and the second resistor material are then selectively etched. The selective etching forms contacts for the first resistor in a first region, and forms a second resistor and associated contacts in a second region.