The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 08, 2005
Filed:
May. 01, 2003
Kuoyin Weng, Milpitas, CA (US);
Hsilin Huang, Milpitas, CA (US);
Chienkang Cheng, Los Altos, CA (US);
Kuoyin Weng, Milpitas, CA (US);
Hsilin Huang, Milpitas, CA (US);
Chienkang Cheng, Los Altos, CA (US);
Via Technologies, Inc., , TW;
Abstract
A method and apparatus for managing power consumption in logic modules without causing power surges. A first and second logic module operate in response to a first and second clock signal, respectively, to carry out a command. When the command arrives, the first logic module begins to operate and indicates that it is busy. After a first delay, the second module begins to operate and indicates that it is busy. When both modules are finished and no new command is available, the busy indicators are deactivated and after a second delay the first clock signal is deactivated. A third delay after the first clock signal is deactivated, the second clock is deactivated. The first, second and third delays are programmable to avoid power surges in the respective modules.