The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 08, 2005

Filed:

May. 07, 2002
Applicant:

Curtis Chih-shan Ling, San Diego, CA (US);

Inventor:

Curtis Chih-shan Ling, San Diego, CA (US);

Assignee:

RFMD WPAN, Inc., San Diego, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03B005/18 ;
U.S. Cl.
CPC ...
Abstract

A method and apparatus for calibrating a voltage-controlled device in a control loop is disclosed. The method and apparatus of the present invention maintains a control voltage of a voltage-controlled device within a high tuning sensitivity range, and thus improves the performance of the voltage-controlled device. The present inventive method and apparatus features a voltage windowing method wherein a high tuning sensitivity window is a subset of the low tuning sensitivity window. In one embodiment, the present invention maintains a control voltage within a predetermined tuning sensitivity window or range. In another embodiment, the present inventive method and apparatus calibrates a PLL that includes multiple VCOs. In yet another embodiment, the present invention calibrates control voltages to account for changes in operating temperature.


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