The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 08, 2005

Filed:

Oct. 01, 2002
Applicant:

Yasuaki Sumi, Tottori, JP;

Inventor:

Yasuaki Sumi, Tottori, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L007/06 ;
U.S. Cl.
CPC ...
Abstract

A PLL circuit including a generating means () for generating a plurality of reference signals (fRto fR) having mutually differing phases, a main frequency divider () dividing an output signal (fVCO) of a voltage-controlled oscillator () by a frequency-division ratio of N1, an auxiliary frequency divider () dividing an output (fV') of the main frequency divider by a frequency-division ratio of N2, a distribution circuit () distributing an output (Q, Q, Q) of the auxiliary frequency divider as a plurality of feedback signals (fVto fV), and phase comparators (to) comparing the reference signals with the feedback signals to output error signals (ERto ER). Each of the main frequency divider and the auxiliary frequency divider is comprised of a variable frequency divider or a counter.


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